A layer-3 IPMC multicast entry has been modified to take another LAG member port. In VPEX topologies, if the IPMC listener is on an extended port LAG, the h/w is programmed with one member port of the LAG. When that member port goes down, the entry is moved to another member port.
This is an informational debug message so there is no remedy.
Debug-Verbose
HW entry (%sourceIpAddress%,%groupIpAddress%,vr %vrId%,vlan %vlanId%,IPMC %IPMCGroupIndex%) -> Vplag L3 p,v=%slot%:%port%,%egressVlanId%
| Name | Type |
|---|---|
| vrId | VRID |
| sourceIpAddress | IPaddrN |
| groupIpAddress | IPaddrN |
| vlanId | VLAN-tag |
| IPMCGroupIndex | uInt32 |
| slot | uInt32 |
| port | uInt32 |
| egressVlanId | VLAN-tag |